đź“–The Genius of RISC-V Microprocessors

authors
Erik Engheim
year
2022
url
https://youtu.be/L9jvLsvkmdM
  • 2:05 Specialized hardware doesn’t need “full” instruction set. However with CISC and complex instruction sets, it’s hard to remove instruction (to save space). RISC, on the other hand, is modular, so it’s possible to implement smaller chips with only necessary instructions
  • 3:30 RISC-V is modular design and has composable extensions
  • 9:00 RISC-V is competitive at low end of the market. less instruction set -> smaller die size -> x^2 lower price (price grows exponentially with the size of the die)
  • 11:00 unsupported instructions are trapped -> allow software emulation
  • 29:00 what registers number of registers is primarily how much space you have in your instructions for encoding (number of transistors is not an issue!) → Number of CPU registers is primarily limited by ISA encoding size

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