p.132 linear scan register allocation yields results of nearly the same quality as graph coloring
p.132 this paper adds optimizations: lifetime holes, split intervals, models register constraints of target architecture. Move splits out of loops, remove register-to-register moves, eliminate unnecessary split stores.
p.133 “An operand of a LIR instruction is either a virtual register, a physical register, a memory address, a stack slot of the stack frame, or a constant.” Register allocator is responsible for replacing virtual registers by physical registers or stack slots.
p.133 For each use position, an operand either must or should be in a physical register. Should allows modeling IA-32 architecture where some instructions can handle memory operands.
